Design Verification Engineer

If you have any questions, please contact the recruiter: Minh H Phan

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.

• Understand the requirements & the functional description of the device to ensure compliance with specifications and error-free functionality.
• Create and execute a verification plan, including verification testbench/patterns/models/System Verilog Assertions (SVAs).
• Develop SVA properties for assertion, assumption and cover statement.
• Develop Universal verification component (UVC) and integrate into the UVM environment
• Debug failures, fix testbench/model/checker issues, analyze and close coverage.
• Write scripts for automation of flow.
• Work with Analog team members to bring-up Chip/System level verification.
• Participate in post-silicon bring-up, validation and compliance testing.

• Bachelor’s or Graduate Degree in: Computer Sciences, Electrical, or Computer Engineering.
• Have at least 2-5 years of proven experience
• Experience with Hardware Descriptive Languages (HDL) such as System Verilog, Verilog or VHDL is required.
• Understand digital hardware architectures and logic (State-machines, RAMs, Registers and bus architectures such as SPI or I2C).
• Good understanding of ASIC design and verification methodologies/flows is a plus

• Knowledge of Object-Oriented programming (OOP) is a plus.
• Knowledge of verification methodologies such as UVM/UVM-MS is a plus.
• Experience with silicon debug which include logic and Analog Blocks working together is a plus.
• Knowledge of the types of circuits targeted for DV, DCDC regulators, LDO, Bandgap, references is a plus.
• Knowledge of behavioral modeling in VAMS Electrical, VAMS wreal, SV-RNM (real-number modeling), SV-EENET, SV-UDN is plus.
• Ability to work in a Linux shell environment and Linux scripting (CSH/TCL/Perl/Python) is a plus.

• Must be self-driven & proactive with a desire to understand, learn more, do more.
• Excellent analytical and debugging skills with the ability to proactively solve issues is required.
• Verbal and written communication skills in English.

MAKE A DIFFERENCE AT QORVO

We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.